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 Post subject: Re: grading challenge
PostPosted: Sun Nov 23, 2025 3:52 pm 

Joined: Mon Dec 25, 2023 9:55 am
Posts: 26
I am on the line as far as grade. High peripheral or low telecom. leaning low tele as I think that the overall chip density (4 ICs on top and multiple MLCCs on bottom)is probably high tele with nice chips.
The weird ceramic things and the relays add some amount of junk. The connector with the bar code on top is gold-plated.
Also would be interested if anyone knows what the white ceramic wafers are on the one end of the board. did not want to remove not knowing what they were.
Thank you.


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 Post subject: Re: grading challenge
PostPosted: Sun Nov 23, 2025 6:07 pm 

Joined: Fri Dec 20, 2019 3:16 am
Posts: 329
Location: Ohio
High Per for sure. You could probably remove the relays and yellow electrolytic capacitors to make Low Tel.

The ceramic boards that are attached were a way to stack chip density and resistors without taking space and using ceramic for thermal expansions and excess heat.

Hybrid ceramic modules or SIP ceramic era

A way we use to do things pretty much in certain applications.


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 Post subject: Re: grading challenge
PostPosted: Sun Nov 23, 2025 6:09 pm 

Joined: Fri Dec 20, 2019 3:16 am
Posts: 329
Location: Ohio
Most ceramic modules I find go straight to High Per and Low Tel with the IC density and low profiles they array...most...but not all.

I would have to see the other sides of the pcb to check


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 Post subject: Re: grading challenge
PostPosted: Mon Nov 24, 2025 12:22 am 

Joined: Mon Dec 25, 2023 9:55 am
Posts: 26
thank you. The back side of the PCB is the second picture.


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 Post subject: Re: grading challenge
PostPosted: Tue Nov 25, 2025 1:36 am 

Joined: Fri Dec 20, 2019 3:16 am
Posts: 329
Location: Ohio
I mean the ceramic stand-offs; if you were thinking of removing, don't til I view the sides. From here they look laser cut but unsure of chip density or in line mlcc's. These will add value, just remove the other stuff.


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